Bandgap voltage reference circuits are well known in the art from the early 1970's as is evidenced by the IEEE publications of Robert Widlar (IEEE Journal of Solid State Circuits Vol. SC-6 No 1 February 1971) and A. Paul Brokaw (IEEE Journal of Solid State Circuits Vol. SC-9 No 6 December 1974).
These circuits implement configurations for the realization of a stabilized bandgap voltage. As discussed in David A. Johns and Ken Martin “Analog Integrated Circuit Design”, John Wiley & Sons, 1997, these circuits and other modifications to same are based on the addition of two voltages having equal and opposite temperature coefficients. This is typically achieved by adding the voltage of a forward biased diode (or base emitter junction voltage) which is complementary to absolute temperature and therefore decreases with absolute temperature (a CTAT voltage) to a voltage which is proportional to absolute temperature and therefore increases with absolute temperature (a PTAT voltage). Typically, the PTAT voltage is formed by amplifying the voltage difference (ΔVbe) of two forward biased base-emitter junctions of bipolar transistors operating at different current densities.
FIG. 1 shows a schematic of such a typical bandgap voltage reference on a CMOS process according to the prior art. It comprises an operational amplifier A, two resistors, r1 and r2, two bipolar transistors Q1 and Q2, and three PMOS devices M1, M2 and M3 arranged as current mirrors. The output of the amplifier A is coupled to the drain of the diode connected PMOS MOSFET M1 and also to the gates of MOSFETS M1, M2 and M3. The sources of M1, M2 and M3 are coupled to the power supply, Vdd. The drain of M2 is coupled to the inverting input of the amplifier A. The drain of M3 is coupled to the emitter of transistor Q1 via resistor r2. The inverting input of the amplifier A is coupled to the emitter of the second transistor Q2 via resistor r1. The emitter area of Q2 is a scalar multiple (n2) the emitter area of Q1. The non-inverting input of the amplifier A is coupled to the emitter of transistor Q1. The bases and collectors of Q1 and Q2 are coupled to ground.
The CTAT voltage is the base-emitter voltage of a forward biased transistor, as mentioned previously. It will be appreciated by those skilled in the art that the temperature dependence of the base emitter voltage may be expressed as:                               V          ⁢                                           ⁢                      be            ⁡                          (              T              )                                      =                                            V              G0                        ⁡                          (                              1                -                                  T                                      T                    0                                                              )                                +                                    V              be0                        ⁢                          T                              T                0                                              -                      σ            ⁢                          kT              q                        ⁢                          ln              ⁡                              (                                  T                                      T                    0                                                  )                                              +                                    kT              q                        ⁢                          ln              ⁡                              (                                                      I                    ⁢                                                                                   ⁢                    c                                                        Ic                    0                                                  )                                                                        (        1        )            
where Vbe(T) is the temperature dependence of the base-emitter voltage for the bipolar transistor at operating temperature,
Vbe0 is the base-emitter voltage for the bipolar transistor at a reference temperature,
Ic is the collector current at the operating temperature, Ic0 is the collector current at the reference temperature,
k is the boltzmann constant,
q is the charge on the electron,
T is the operating temperature in Kelvin,
VG0 is the bandgap voltage or base-emitter voltage at the reference temperature,
T0 is the reference temperature, and
σ is the saturation current temperature exponent.
The first two terms in this equation demonstrate the linear decrease of the base-emitter voltage as temperature is increasing. Thus, it can be seen that the base-emitter voltage is a CTAT voltage, as stated previously.
The two bipolar transistors, Q1 and Q2, of FIG. 1 are used to generate the required PTAT voltage. As the emitter area of Q2 is n2 times the emitter area of Q1, and the current flowing into the emitter of Q1 is n1 times greater compared to the emitter current of Q2, Q1 operates at a higher current density than Q2. The ratio of the two emitter current densities is then n1*n2.
This relationship between the current densities of Q1 and Q2 enables the generation of the PTAT voltage as follows. In operation, the amplifier A forces respective currents Ip, Ip and n1*Ip from feedback mirrors M1, M2 and M3 as feedback currents, which ensures that the two amplifier inputs settle when they have substantially the same potential. As a result, a PTAT voltage, being the base-emitter voltage difference between Q1 and Q2, develops across the resistor r1 as a voltage drop of current Ip. The PTAT voltage can be expressed in the following equation:                               Δ          ⁢                                           ⁢                      V            be                          =                              kT            q                    ⁢                      ln            ⁡                          (                              n1                ·                n2                            )                                                          (        2        )            
It will be understood therefore that both PTAT and CTAT voltages are provided at the inputs to the amplifier. This addition of the PTAT and CTAT voltages at the amplifier results in the generation of a reference voltage which is substantially temperature independent for a specific combination of resistor ratios (r2/r1) and current density.
There are several limitations on bandgap voltage reference sources as described above. The first limitation is the process in which the reference source has to be implemented. For precision, a bipolar process is preferred. This is because bipolar transistors have a smaller offset when compared to MOS transistors. From a cost point of view, a CMOS process is preferred. However, when bipolar transistors are implemented in CMOS technology, only parasitic bipolar transistors are available. Typically, a parasitic bipolar transistor may be a substrate bipolar transistor having only two terminals available, namely the base and emitter, with the third terminal, the collector, being connected to the substrate. This results in severe design limitations.
A second source of error in CMOS bandgap reference sources is caused by amplifier and current mirror offsets, mainly due to the CMOS process variations in a CMOS transistor.
As the market trend is to move to a lower supply voltage, the minimum supply voltage of a device is an important factor. As a result, typically there is a trade-off between minimum supply voltage and errors in reference performance, expressed in what is commonly accepted “statistical standard deviation” or “sigma”.
Let us annotate the base-emitter voltage of the bipolar transistor operating at high current density (Q1 in FIG. 1) as Vbe1, since it usually has a unity emitter area. Let us also annotate the base-emitter voltage of the transistor operating at low current density (Q2 in FIG. 1) Vben, as it usually has an emitter area n (n2 in FIG. 1) times larger than Q1. If we assume that Q1 operates at a collector current of the order of μA and the collector current density ratio of Q1 to Q2 is 50 at room temperature, these values are about: Vbe1=700 mV, Vben=600 mV, and the difference between them, ΔVbe=100 mV. A typical bandgap voltage based on summation of a CTAT and PTAT voltage is about 1.2V. As a result, the PTAT voltage (which is the voltage drop across r2 in FIG. 1) should be of the order of 500 mV and the resistor ratio in FIG. 1, r2/r1, is 5. If the amplifier in FIG. 1 has an offset voltage Voff, then the output voltage offset is                               V          out_off                =                                            V              off                        ⁡                          (                              1                +                                                      r                    ⁢                    2                                                        r                    ⁢                    1                                                              )                                =                                    V              off                        *            6                                              (        3        )            
As a result, each millivolt in offset voltage is reflected as 6 mV into the reference voltage. It will be appreciated that this ratio of offset voltage to reference voltage is quite substantial. The circuit according to FIG. 1 can operate at low supply voltage, as the common input voltage for the amplifier is Vbe1.
FIG. 2 shows another prior art circuit which aims to reduce the sensitivity of the reference voltage to the amplifier's offset. FIG. 2 achieves this by increasing the voltage drop across resistor r1 by stacking base-emitter voltages as shown, so that the amplifier's offset voltage ΔVbe is increased before amplification. An increase in the voltage drop decreases the ratio of the offset voltage to the input voltage of the amplifier, and thus decreases the sensitivity of the reference voltage to the amplifier offset voltage.
The difference between FIG. 1 and FIG. 2 is the inclusion of two additional bipolar transistors, Q3 and Q4, and two additional PMOS transistors, M4 and M5, so as to provide a stacked transistor configuration. The emitter of Q1 in FIG. 2 is now coupled directly to the drain of PMOS M3. The base of Q1 is now connected to the emitter of a transistor Q3, having the same emitter area as Q1. A PMOS MOSFET M4 is coupled to the emitter of transistor Q3 via resistor r2. The base of transistor Q2 is coupled to the emitter of a transistor Q4. The emitter of transistor Q4 is also coupled to the drain of a MOSFET M5. The bases of Q4 and Q3 are coupled to ground. The emitter areas of Q2 and Q4 are selected so as to be greater than the emitter areas of Q1 and Q3. This ensures that the emitter and collector current densities of Q1 and Q3 will be higher than the corresponding current densities of Q2 and Q4.
It will be appreciated that the addition of such a transistor stack results in the voltage drop over resistor r1 in the circuit of FIG. 2 being larger than the voltage drop across r1 for the circuit of FIG. 1. This voltage drop can be expressed as:                               Δ          ⁢                                           ⁢          V          ⁢                                           ⁢          be                =                              kT            q                    ⁢                      ln            ⁡                          (                              n1                ·                n2                ·                n3                ·                n4                            )                                                          (        4        )            
The voltage drop across r1 is twice ΔVbe and in order to generate a PTAT voltage of 5ΔVbe, we need a gain of 2.5. Accordingly the output offset voltage is:                               V          out_off                =                                            V              off                        ⁡                          (                              1                +                                                      r                    ⁢                    2                                                        r                    ⁢                    1                                                              )                                =                                    V              off                        *            3.5                                              (        5        )            
However, while the voltage reference source circuit of FIG. 2 reduces the reference voltage sensitivity to the amplifier's voltage offset, this circuit needs a higher supply voltage when compared to the circuit of FIG. 1, as the amplifier's input voltage is now 2 Vbe1. It will be appreciated, therefore, that this circuit has the disadvantage that it cannot be implemented where a low supply voltage is required or provided.
U.S. Pat. No. 6,507,180, entitled “Bandgap Reference Circuit with Reduced Output Error”, discloses a further design, which focuses on a reduction in the sensitivity of the reference source to offset voltage. The invention discloses a bandgap reference circuit capable of reducing an error with respect to a designed reference voltage and a temperature drift. This patent application is incorporated herein by reference. It comprises a first, second and a third serial circuit constituting a feedback control circuit in combination, as shown in FIG. 2 of the patent specification. The feedback control circuit is designed so that it reduces the influence of an offset voltage on the reference source and therefore the reference source voltage error. According to the results as disclosed in the patent specification, the invention results in a reduced output error component of 14.5 mV and an error ratio of 1.23. This result compares favorably with the error component of a conventional bandgap reference source, which is typically of the order of 22.5 mV with an error ratio of 1.77.
Although this is an improvement, the influence of an offset voltage on the reference source is quite high. There is therefore still a requirement to provide a reference source with reduced sensitivity to voltage offset and which can also operate at low supply voltages.